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ZYM/RISC-V-Simulator
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62 Commits 1 Branch 0 Tags
90033d5c6353f882e926d4791522cc88cc356b8e
Commit Graph

8 Commits

Author SHA1 Message Date
ZhuangYumin
d6e6498eee fix fatal bugs, ready to inspect value processing 2024-08-01 00:24:02 +00:00
DarkSharpness
63ffb230d4 feat(modules): add a new modules demo 2024-07-24 10:31:53 +08:00
Wankupi
2fc44f14c9 feat: fix compile error and update demo 2024-07-23 20:04:41 +08:00
DarkSharpness
192de26ad6 style: rename "tools" -> "tools.h" 2024-07-23 11:07:32 +08:00
DarkSharpness
ec8b3895ff feat(alu): add an alu demo 2024-07-12 11:36:09 +08:00
DarkSharpness
1693df2820 refactor: redesign the type system | embrace the new bit_type concept 2024-07-11 20:38:05 +08:00
DarkSharpness
5f82fe975c feat(bit): add a demo and add some functions for the bit class 2024-07-09 23:19:36 +08:00
DarkSharpness
68dd99a826 initial commit | complete a draft outline 2024-07-09 21:04:36 +08:00
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