ZYM/RISC-V-Simulator
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adjust output

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This commit is contained in:
ZhuangYumin
2024-08-01 14:20:54 +00:00
parent 90033d5c63
commit 00fc4c945e
10 changed files with 99 additions and 96 deletions
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4
include/cpu.h
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@ -65,12 +65,12 @@ public:
auto func = shuffle ? &CPU::run_once_shuffle : &CPU::run_once;
reset_signal=true;
while (max_cycles == 0 || cycles < max_cycles) {
std::cerr<<"\nclock: "<<std::dec<<global_clock<<std::endl;
DEBUG_CERR<<"\nclock: "<<std::dec<<global_clock<<std::endl;
(this->*func)();
reset_signal=false;
halt_signal.sync();
uint32_t halt_signal_value = static_cast<max_size_t>(halt_signal);
std::cerr<<"simulator received halt_signal_value="<<std::dec<<halt_signal_value<<std::endl;
DEBUG_CERR<<"simulator received halt_signal_value="<<std::dec<<halt_signal_value<<std::endl;
if(halt_signal_value &(1<<8)) {
return halt_signal_value&0xff;
}